Dislocation modeling for the microelectronics industry

Abstract

We review the use of dislocation modeling as a practical tool in the development of semiconducting devices. Areas of application include calculation of single dislocation behavior in transistors and memory cells, large-scale simulations of relaxation in SiGe/Si and SiGe/SOI layer systems, and investigation of dislocation nucleation at stress concentrators. Current capabilities and case studies for each are reviewed, and areas where further progress is needed are identified. © 2005 Elsevier B.V. All rights reserved.