Nanostructured porous silicon materials have recently advanced as hosts for Li-metal plating. However, limitations involve detrimental silicon self-pulverization, Li-dendrites, and the ability to achieve wafer-level integration of non-composite, pure silicon anodes. compo. Herein, full cells featuring low-resistance, wafer-scale porous crystalline silicon (PCS) anodes are embedded with a nanoporous Li-plating and diffusion-regulating surface layer upon combined wafer surface cleaning (SC) and anodization. LL Lithiophilic surface formation is illustrated via correlation of surface groups and X-ray structure. Low-cost SC-PCS anodes require no composite formulation, and pre-lithiation enables sustainable Li-metal plating/stripping on the lithiophilic surface and in SC-PCS bulk nanostructure. Anodization time and C-rate determined competitive full cell performance: NMC811 | 4800 s SC-PCS: 195 mAh/g (99.9% coulombic efficiency [C.E.], C/3, 50 cycles), 165 mAh/g, 587 Wh/kg (97.1% C.E., C/3 and C/2 rate, 350 cycles), 24 Ω∗cm2 SC-PCS-resistivity (900 cycles); 160 μm LCO | 500 s SC-PCS: 102 mAh/g (94.1% C.E., 1C, 350 cycles).