Publication
FPL 2018
Conference paper

Deterministic parallel routing for FPGAs based on galois parallel execution model

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Abstract

This paper describes a deterministic and parallel implementation of the VPR routability-driven router for FPGAs. We considered two parallelization strategies: (1) routing multiple nets in parallel; and (2) routing one net at a time, while parallelizing the Maze Expansion step. Using eight threads running on eight cores, the two methods achieved speedups of 1.84× and 3.67×, respectively, compared to VPR's single-threaded routability-driven router. Removing the determinism requirement increased these respective speedups to 2.67× and 5.46×, while sacrificing the quarantee of reproducible results.

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Publication

FPL 2018

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