Design considerations for CMOS near the limits of scaling

Abstract

As MOSFETs reach the limits of scaling, a variety of physical and application-related constraints must be considered. This paper provides an overview of these constraints for conventional bulk-like MOSFET design, including two-dimensional effects due to short-channel length, tunneling currents through thin insulators and junctions, limitations on supply and threshold voltage reduction, dopant fluctuation effects, and overall system power dissipation requirements. We show that the end of scaling is different for different applications, depending especially on the leakage dissipation constraints. © 2002 Elsevier Science Ltd. All rights reserved.