Current Understanding and Future Challenges of Gate Dielectric Breakdown Reliability

Abstract

Dielectric reliability has faced new challenges with the increasing complexities of new device structures such as the gate-all-around (GAA) nanosheet (NS) devices and the introduction of new materials such as two-dimensional (2D) gate dielectrics due to technology scaling. Meanwhile, the requirements become more urgent than ever for breakdown evaluation and qualification to maintain the same or more stringent reliability specifications. These demands require a thorough understanding of failure statistics and a detailed knowledge of failure mechanisms in dielectric breakdown (BD). This tutorial will describe and summarize fundamental BD phenomena found on various gate dielectrics over a wide range of dielectric thicknesses across multiple technology nodes. I will review defect generation processes and the associated statistical descriptions at different stages such as stress-induced leakage current (SILC), onset of soft BD (SBD) events, and post-BD (PBD) events, which eventually lead to device and/or circuit failures. In addition, several voltage acceleration models, especially the power-law model, widely used in BD reliability assessment, will be discussed along with the status of microscopic BD physics. Concerning technology qualifications, we will highlight the impact of acceleration models and post-BD methodologies, recently adopted by JEDEC standards https://www.jedec.org/system/files/docs/JESD263.pdf for the global microelectronics industry. A full technology qualification encompasses not only intrinsic reliability but also variability attributes. Thus, methodologies to mitigate these variability issues will be provided in this tutorial. Moreover, I will review the traditional percolative statistics in terms of thickness- and area- scaling of BD phenomena in light of new reports based on Markov modeling work. On the other hand, I will discuss new area scaling phenomena such as reverse area scaling recently reported in HfO 2 as well as the latest development for TDDB reliability of 2D gate dielectrics including layer-by-layer BD effect found in hexagonal boron-nitrides (h-BN). Finally, future opportunities for research and development works in areas of dielectric breakdown will be outlined.