Abstract
Linear load, depletion-mode load, four-phase dynamic and complementary MOSFET logic circuits are compared on the basis of power, delay, and density for two specific master slice layouts. The circuits were designed in a common technology base, and normalized power and delay characteristics were calculated by simulation. Chips of 1280 circuits were designed in images having one and two layers of metal, and power versus delay curves were calculated. The effect of an insulating substrate was also considered. Copyright 1973 by The Institute of Electrical and Electronics Engineers, Inc.