Bonding of thin films on 200 mm silicon wafers using chemical mechanical polishing

Abstract

New types of double-gated integrated circuit devices require the construction of a silicon layer on top of multilayer stacks of material, for example, placing thin oxide and conductor layers underneath the silicon. Bonding deposited films like LTO, TEOS and heavily doped amorphous silicon to thermal oxide on 200 mm wafers is then necessary. Although LTO and TEOS grown on silicon are very smooth, doped a-Si and films grown on n+ a-Si are quite rough. As micro-scale surface roughness has a strong effect on the success of silicon wafer bonding, chemical-mechanical polishing before bonding is necessary when films are deposited with high roughness or if surfaces become rough during processing. As the wafers are intended for integrated circuit processing, thickness variation of the films over the 200 mm wafer and its effect on the wafer bonding are also concerns.