The behavior of a number of experimental CdS thin film transistors has been studied. The fabrication procedure for these devices is discussed and data illustrating the variation of device behavior with temperature and with frequency are presented. It is shown that these observations are in accord with the notion that the carrier mobility as well as the carrier concentration is altered by the gate voltage. All of the devices which were studied exhibit a frequency dependence which can be understood in terms of slow traps. The evidence suggests that these traps are located on the surface of the CdS layer. © 1964.