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Publication
IEEE TAS
Conference paper
Analog-to-digital converter testing method based on segmented correlations
Abstract
The high sampling rates of superconducting analog-to-digital (A/D) converters complicate testing since the output data rates often exceed the capacity of the interface to room-temperature electronics. Capturing the data with an on-chip shift register allows low speed interfacing, but integration limits of current Josephson technology make such an approach impractical for oversampling converters, as the shift register length must be much larger than the oversampling ratio (OSR). In this paper, we describe a scheme in which two segments of the output data stream are captured with a pair of shift registers, whose lengths can be less than the OSR. The number of clock cycles skipped between acquiring the two segments is set by an on-chip programmable counter (from 0 to N, where N is much larger than the OSR). Cross-correlation of the two segments provides an estimate of the output autocorrelation function R[n], over a narrow range of n. By reprogramming the counter, other sections of R[n] can be estimated through successive measurements, allowing assembly of the entire function R[n] (up to n = N). Fourier transformation of R[n] yields a spectrum with the frequency resolution of an N-point FET. Both low-pass and bandpass A/D converters can be studied with the method.