An area and latency assessment for coding for memories with stuck cells

Abstract

We explore the implementation in hardware of encoders for algebraic codes for binary memories that have some cells stuck to given values. The location and stuck values of the cells are assumed to be known at encode time, but not at decode time. Recently, an algorithm for BCH-like codes for stuck cells was developed that relies on a type of polynomial interpolation in an extension field followed by a step of projection of the result of the interpolation back into the binary field. In this article, we report on the area and latency of a sequential implementation of this encoding algorithm for a variety of values for the number of stuck cells. The statistics on area and latency follow from preliminary circuit synthesis results obtained from a full VHDL implementation of these examples. ©2010 IEEE.