Conference paper
An O(n1+ε log B) algorithm for the complex roots problem
C. Andrew Neff, John H. Reif
FOCS 1994
In the synthesis of digital circuits, one encounters the problem of identifying blocks which have been designed, so that there is no replication in the expensive effort of generating the physical layout of these blocks. We present a model for the synthesis of combinational logic into complex MOS circuits and present a ranking and unranking procedure to characterize the layout of each complex MOS circuit. © 1987 IEEE
C. Andrew Neff, John H. Reif
FOCS 1994
Ravi Nair
IEEE TC
Ravi Nair, C. Leonard Berman, et al.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Alfred J Park, Cheng-Hong Li, et al.
SIMULATION