A packaging solution for optically testing wire-bonded chips

Abstract

In this paper, we describe the design and the experimental characterization of a packaging technique for backside optical testing of chips requiring wirebonding. Optical testing methods, based either on the collection of spontaneous hot-carrier photoemission or on laser stimulation, require an optical access to the active area of the circuit through the backside of the chip, while still providing mechanical support to the thinned die (very fragile), heat sinking capability, power and electrical signals. The proposed package fulfils all these requirements and it can hence be used for picosecond imaging for circuit analysis/time resolved emission measurements, emission microscopy investigations, laser voltage probe, thermal laser stimulation, photoelectric laser stimulation, and other failure analysis methods that require optical access to the transistor level through the silicon backside. The advantages of the new package are its versatility (it can fit different chip sizes), easy handling, low cost, and the fact that it is designed for optical testing and not just for electrical testing. We successfully used the proposed package for optically test chips in advanced complementary metal-oxide-semiconductor technologies (65 nm): measurements at low voltage are possible thanks to the proposed package. © 2008 IEEE.