Conference paperHigh-performance sub-0.08 μm CMOS with dual gate oxide and 9.7 ps inverter delayM. Hargrove, S.W. Crowder, et al.IEDM 1998
Conference paperCoupling analysis of through-silicon via (TSV) arrays in silicon interposers for 3D systemsBiancun Xie, Madhavan Swaminathan, et al.EMC 2011
PaperEffects of mask materials on near field optical nanolithographySharee J. McNab, Richard J. BlaikieMaterials Research Society Symposium - Proceedings
