Synthesis design strategies for energy-efficient microprocessors
Ching Zhou, Yu-Shiang Lin, et al.
ICCD 2016
Recent progress in ultra-low-power circuit design is creating new opportunities for cubic millimeter computing. Robust low-voltage operation has reduced active mode power consumption considerably, but standby mode power consumption has received relatively little attention from low-voltage designers. In this work, we describe a low-voltage processor called the Phoenix Processor that has been designed at the device, circuit, and architecture levels to minimize standby power. A test chip has been implemented in a carefully selected 0.18 μm process in an area of only 915 × 915 μm2. Measurements show that Phoenix consumes 35.4 pW in standby mode and 226 nW in active mode. © 2006 IEEE.
Ching Zhou, Yu-Shiang Lin, et al.
ICCD 2016
Scott Hanson, Bo Zhai, et al.
IBM J. Res. Dev
Insup Shin, Jae-Joon Kim, et al.
IEEE Transactions on VLSI Systems
Daniel Martí, Mattia Rigotti, et al.
Neural Computation