Real time counter mchines preliminary version
Patrick C. Fischer, Albert R. Meyer, et al.
SWAT 1967
We present the design of a dictionary machine that is suitable for VLSI implementation, and we discuss how to realize this implementation efficiently. The machine supports the operations of search, insert, delete, and extractmIN on an arbitrary ordered set Each of these operations takes time 0(log n),\ where n is the number of entries present when the operation is performed. Moreover, arbitrary sequences of these instructions can be pipelined through the machine at a constant rate (i.e., independent of n and the capacity of the machine). The time 0(log n) is an improvement over previous VLSI designs of dictionary machines which require time 0(log TV) per operation, where N is the maximum number of keys that can be stored. Copyright © 1982 by The Institute of Electrical and Electronics Engineers, Inc.
Patrick C. Fischer, Albert R. Meyer, et al.
SWAT 1967
Arnold L. Rosenberg
Journal of the ACM
John S. Lew, Arnold L. Rosenberg
Journal of Number Theory
Arnold L. Rosenberg, Derick Wood, et al.
STOC 1979