Publication
RFIC 2014
Conference paper

A 46.4-58.1 GHz frequency synthesizer featuring a 2nd harmonic extraction technique that preserves VCO performance

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Abstract

This paper introduces a 2nd harmonic extraction technique in a 46.4-58.1 GHz frequency synthesizer. The frequency doubling approach is based on tapping second harmonic signals at the VCO supply and tail nodes and amplifying them to provide a differential output. Since the amplifiers do not load the VCO outputs, neither the tuning range nor the frequency of the VCO is affected. Moreover, a novel noise bypass technique is utilized to ensure that the amplifiers do not degrade the VCO phase noise. As a result, the frequency synthesizer achieves 22.4% tuning range (46.4-58.1 GHz) and phase noise below -118dBc/Hz while consuming 66mW power from a 1V supply. The synthesizer occupies 0.6mm×1mm in IBM 32SOI CMOS. © 2014 IEEE.

Date

01 Jun 2014

Publication

RFIC 2014

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