Conference paper
CCD memory using multilevel storage
Lewis M. Terman, Yen S. Yee, et al.
ISSCC 1981
An MOS comparator circuit capable of detecting difference signals as low as 1 mV in 3 µs has been designed, built, and tested. The circuit does not require high accuracy components or tight control of device parameter tolerances. © 1978, IEEE. All rights reserved.
Lewis M. Terman, Yen S. Yee, et al.
ISSCC 1981
Date J. W. Noorlag, Lewis M. Terman, et al.
IEEE Journal of Solid-State Circuits
Andrew S. Grove, Lewis M. Terman
ISSCC 1975
Lewis M. Terman, Yen S. Yee, et al.
ISSCC 1981