Mark Ferriss, Bodhisatwa Sadhu, et al.
ISSCC 2016
4 multiplexer and 1 demultiplexer ICs targeting SONET OC-768 applications are reported..The ICs have been implemented using a 120-GHz-fT 0.18-μm SiGe BiCMOS process. Both ICs have Been packaged to enable bit error rate testing by connecting their serial interfaces. Error-free operation has been achieved for both circuits at data rates Beyond 50 Gb/s. At a - 3.6-V supply voltage, the multiplexer and demultiplexer dissipate 410 and 430 mA, respectively. Switching behavior of the 4 : 1 multiplexer has also been checked up to 70 Gb/s.
Mark Ferriss, Bodhisatwa Sadhu, et al.
ISSCC 2016
A. Goel, Alexander V. Rylyakov, et al.
VLSI Circuits 2010
Jonathan E. Proesel, Zeynep Toprak-Deniz, et al.
VLSI Circuits 2017
Fuad E. Doany, Benjamin G. Lee, et al.
ECTC 2012