Mori Ohara

Title

Deputy Director, IBM Research Tokyo, Distinguished Engineer, Chief SW Engineer for Hybrid Cloud on IBM HW

Mori Ohara

Bio

Moriyoshi Ohara's research interests span across software technologies to take advantage of differentiating hardware features, such as confidential computing and hardware acceleration for AI foundation models.

He received a Ph.D. degree in Electrical Engineering from Stanford University in 1996 and is a Senior Member of Association for Computing Machinery (ACM).

Publications

Automatic Optimize-time Validation for Binary Optimizers
- - Motohiro Kawahito
  - Reid Copeland
  - et al.
- 2021
- Journal of Information Processing
Detecting Layered Bottlenecks in Microservices
- - Tatsushi Inagaki
  - Yohei Ueda
  - et al.
- 2022
- CLOUD 2022
RaPiD: AI Accelerator for Ultra-Low Precision Training and Inference
- - Swagath Venkataramani
  - Vijayalakshmi Srinivasan
  - et al.
- 2021
- ISCA 2021
Efficient AI System Design with Cross-Layer Approximate Computing
- - Swagath Venkataramani
  - Xiao Sun
  - et al.
- 2020
- Proceedings of the IEEE
Hyperledger Fabric Performance Characterization and Optimization Using GoLevelDB Benchmark
- - Takuya Nakaike
  - Qi Zhang
  - et al.
- 2020
- ICBC 2020
DeepTools: Compiler and Execution Runtime Extensions for RaPiD AI Accelerator
- - Swagath Venkataramani
  - Jungwook Choi
  - et al.
- 2019
- IEEE Micro
A Compiler for Deep Neural Network Accelerators to Generate Optimized Code for a Wide Range of Data Parameters from a Hand-crafted Computation Kernel
- - Eri Ogawa
  - Kazuaki Ishizaki
  - et al.
- 2019
- COOL CHIPS 2019
Profile-based Detection of Layered Bottlenecks
- - Tatsushi Inagaki
  - Yohei Ueda
  - et al.
- 2019
- ICPE 2019
Identifying the potential of near data processing for Apache Spark
- - Ahsan Javed Awan
  - Eduard Ayguadé
  - et al.
- 2017
- MEMSYS 2017
Performance competitiveness of a statically compiled language for server-side Web applications
- - Yohei Ueda
  - Moriyoshi Ohara
- 2017
- ISPASS 2017

Patents

- 19 May 2009
- US
- 7536532
Merge Operations Of Data Arrays Based On Simd Instructions
- 10 Mar 2009
- US
- 7503039
Preprocessor To Improve The Performance Of Message-passing-based Parallel Programs On Virtualized Multi-core Processors
- 18 Nov 2008
- US
- 7454698
Digital Document Browsing System And Method Thereof
- 01 Jul 2008
- US
- 7394411
A Fast Implementation Of Decoding Function For Variable Length Encoding
- 25 May 2007
- JP
- 3962370
Cpu Resource Reservation System For Cpu Using Simultaneous Multi Threading
- 06 Apr 2007
- JP
- 3938387
A Preprocessor To Improve The Performance Of Message-passing-based Parallel Programs On Virtualized Multi-core Processors
- 16 Feb 2007
- JP
- 3916124
A New Document Browsing Scheme Using Text Summarization And Layout Adaptation With User's View History
- 23 May 2006
- US
- 7050060
Data Transferring Apparatus And Its Method
- 26 Apr 2004
- TW
- NI-193800
A Method To Drive High-content Displays Using Commercially-available Graphics Adapters
- 09 Dec 1998
- DE
- 69130580.3
An Adaptive Cache Protocol Switching Mechanism

Projects

Systems Research in Tokyo

View more projects

View more projects

Top collaborators

KI

Kazuaki Ishizaki

Kazuaki Ishizaki

Senior Technical Staff Member, Research

SV

Swagath Venkataramani

Swagath Venkataramani

Principal Research Scientist, AIU Architecture and Compilers

HI

Hiroshi Inoue

Hiroshi Inoue

Research Staff Member

YU

Yohei Ueda

Yohei Ueda

Staff Research Scientist