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IBM Hardware Verification Track 2006
October 23, 2006
Organized by IBM Research Lab in Haifa, Israel
Invitation
IBM Haifa Research Lab (HRL) cordially invites you to a full-day conference track on verification, which is part of the Haifa Verification Conference on the subject of verification technologies and software testing.
This is the seventh in a sequence of verification seminars held by IBM Haifa labs since 1999. This is the second year we have integrated it with the Haifa Verification Conference.
The conference track will take place on Monday, the 23th of October, 2006 at the IBM Haifa Labs site on the University of Haifa campus, in the Auditorium (Room L100), from 9:30 to 17.15. Lunch and light refreshments will be served. Participation is free.
Please confirm your participation, via the seminar website: http://www.haifa.il.ibm.com/Workshops/verification2006/registration.html
Hardware Verification Track Topics
- Microprocessors, ASICs, SOCs, and system verification
- Experiences with simulation based and formal verification
- Classification of hardware bugs
- High-level test generation for functional verification
- Simulation based verification
- Use of PSL: methodologies and experiences
- Emulation and acceleration techniques in verification
- Post-silicon debugging
- Formal methods and their applications
- Verification using SAT
- Verification coverage
- Equivalence checking
- Path analysis for verification
- Design for verifiability
- Hardware/software co-verification and co-testing
- Use of ESL methods for verification
- Simulation checking: assertion-based, high-level rule-based, reference models and score-boards
- CSP applications in functional verification
- Hybrid simulation and formal analysis methods
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Proceedings publication: Springer Lecture Notes in Computer Science
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