A 5.6-100K, 128ppm/K Cryo-CMOS Current Reference
- Subhajit Ray
- David Frank
- et al.
- 2025
- VLSI Technology and Circuits 2025
Publications
NanoStack Transistor Architecture for CMOS 7A Node and Beyond
- S. Reboh
- C. Zhang
- et al.
- 2025
- VLSI Technology and Circuits 2025
Scaled-Footprint Ultra-Low Power Cryogenic InGaAs/InP HEMTs with Record-High Combination of Low-Noise and High-Frequency Performance
- Alberto Ferraris
- Eunjung Cha
- et al.
- 2025
- VLSI Technology and Circuits 2025
A 6+ Ghz 128Kb Multi-Port L1 Cache Using Ground Rule Clean 10T Bitcells in 5Nm Technology
- Rajiv Joshi
- John Davis
- et al.
- 2025
- VLSI Technology and Circuits 2025
M-Series Fan-Out Interposer Technology (MFIT) - Scaling Up for HPC & AI
- Craig Bishop
- Jan Kellar
- et al.
- 2025
- ECTC 2025
DiffChip: Thermally Aware Chip Placement with Automatic Differentiation
- Giuseppe Romano
- Aakrati Jain
- et al.
- 2025
- ECTC 2025
Self-Alignment of Active Si Bridge using Solder Joint Capillary Forces
- Thomas Lesueur
- David Danovitch
- et al.
- 2025
- ECTC 2025
Characterization of Interfacial Fracture Strength in Hybrid Bonded Wafers: A Novel Approach for High-Resolution Spatial Profiling
- Sathya Raghavan
- Ben Yang
- et al.
- 2025
- ECTC 2025
Fast and Accurate Machine Learning Prediction of Back-End-of-Line Thermal Resistances in Backside Power Delivery and Chiplet Architectures
- Prabudhya Roy Chowdhury
- Aakrati Jain
- et al.
- 2025
- ECTC 2025
Fully Encapsulated Fine Pitch Dual Damascene Organic RDL With Low Dk Df Photosensitive Polyimide and its Reliability
- Minhua Lu
- Joyce Liu
- et al.
- 2025
- ECTC 2025