Trends in semiconductor memories

Yasunao Katayama

doi:10.1109/40.641592

IEEE Micro

Review

01 Nov 1997

Trends in semiconductor memories

View publication

Abstract

Despite their great market success, DRAMs have not kept pace with microprocessor improvements, so researchers are looking to advanced high-speed DRAM and merged DRAM/logic technologies to increase memory system performance.

Paper

Efficient error correction code configurations for quasi-nonvolatile data retention by DRAMs

Yasunao Katayama, Yasushi Negishi, et al.

IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems

Conference paper

Error evaluation algorithm for oneshot Reed-Solomon decoder

Yasunao Katayama, Sumio Morioka

ITCOM 1999

Conference paper

Software-defined massive multicore networking via freespace optical interconnect

Yasunao Katayama, Atsuya Okazaki, et al.

CF 2013

Conference paper

60-GHz single-carrier coherent detection system with robust 16-QAM signal recovery

Daiju Nakano, Yasuteru Kohda, et al.

WCNC 2014

View all publications

Abstract

Related

Efficient error correction code configurations for quasi-nonvolatile data retention by DRAMs

Error evaluation algorithm for oneshot Reed-Solomon decoder

Software-defined massive multicore networking via freespace optical interconnect

60-GHz single-carrier coherent detection system with robust 16-QAM signal recovery