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Publication
NeurIPS 1994
Conference paper
The Ni1000: High Speed Parallel VLSI for Implementing Multilayer Perceptrons
Abstract
In this paper we present a new version of the standard multilayer perceptron (MLP) algorithm for the state-of-the-art in neural network VLSI implementations: the Intel Ni1000. This new version of the MLP uses a fundamental property of high dimensional spaces which allows the l2-norm to be accurately approximated by the l1-norm. This approach enables the standard MLP to utilize the parallel architecture of the Ni1000 to achieve on the order of 40000, 256-dimensional classifications per second.