About cookies on this site Our websites require some cookies to function properly (required). In addition, other cookies may be used with your consent to analyze site usage, improve the user experience and for advertising. For more information, please review your options. By visiting our website, you agree to our processing of information as described in IBM’sprivacy statement. To provide a smooth navigation, your cookie preferences will be shared across the IBM web domains listed here.
Publication
IRPS 2009
Conference paper
The effect of interface thickness of high-k/metal gate stacks on NFET dielectric reliability
Abstract
This paper explores the trade-offs of interface layer (IL) thickness, interface growth process, and interface nitrogen content on NFET dielectric reliability using ramp breakdown tests. The median breakdown voltage and the Weibull slope correlate strongly with the gate leakage irrespective of the IL process. Both reliability parameters are predominately modulated by the IL thickness. ©2009 IEEE.