Cheng Li, Abdul Dakkak, et al.
IPDPS 2020
In the face of large-scale process variations, statistical timing methodology has advanced significantly over the last few years, and statistical path selection takes advantage of it in at-speed testing. In deterministic path selection, the separation of path selection and test generation is known to require time consuming iteration between the two processes. This paper shows that in statistical path selection, this is not only the case, but also the quality of results can be severely degraded even after the iteration. To deal with this issue, we consider testability in the first place by integrating a satisfiability (SAT) solver, and this necessitates a new statistical path selection method. We integrate the SAT solver in a novel way that leverages the conflict analysis of modern SAT solvers, which provides more than 4X speedup without special optimizations of the SAT solver for this particular application. Our proposed method is based on a generalized path criticality metric whose properties allow efficient pruning. Our experimental results show that the proposed method achieves 47% better quality of results on average, and up to 361X speedup compared to statistical path selection followed by test generation. © 1982-2012 IEEE.
Cheng Li, Abdul Dakkak, et al.
IPDPS 2020
Zhen Cao, Tom Tong Jing, et al.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Jinjun Xiong, Lei He
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Wen-Mei Hwu, Izzat El Hajj, et al.
ICRC 2017