Compilation of quantum circuits in the near-term area is a challenging task, mainly since the quantum hardware is noisy hence requires advanced mitigation methods, and its connectivity is restricted (e.g., a grid or a heavy-hex). Advanced error mitigation methods, such as Probabilistic Error Cancellation (PEC) and Zero Noise Extrapolation (ZNE) require learning the noise-model for each unique gate layer, and therefore require the circuit representation to minimize the number of unique two-qubit gate layers (like the CX-layer). This is since more unique layers don’t just increase the runtime, they also increase the risk of failure because the quantum device’s noise might drift away from the learned noise model. With this in mind, our main goal is to reduce the number of unique CX-layers. Another requirement is that the depth of the circuit, or equivalently, the total number of CX layers, must be as small as possible, as two-qubit gates are noisier than single-qubit gates, and hence additional layers of CX gates increase the total noise. In this talk we will present some recent algorithms to compile certain quantum circuits (linear reversible circuits, Clifford circuits, stabilizer circuits, GHZ-like circuits etc.) for certain connectivities (line, grid, heavy-hex etc.) using a minimal number of unique CX layers.