Symbolic Design of Combinational and Sequential Logic Circuits Implemented by Two-Level Logic Macros

Abstract

This paper presents a method for the optimal synthesis of combinational and sequential circuits implemented by two-level logic macros, such as programmable logic arrays. Optimization consists of finding representations of switching functions corresponding to minimal-area implementations. The design of optimization is based on two steps: symbolic minimization and constrained encoding. Symbolic minimization yields an encoding-independent sum of products representation of a switching function which is minimal in the number of product terms. The minimal symbolic representation is then encoded into a compatible Boolean representation. The algorithms for symbolic minimization and the reated encoding problems are described. The computer implementation and the experimental results are then presented. © 1986 IEEE.