Conference paper
Optimizing history effects in 65nm PD-SOI CMOS
Q. Liang, T. Kawamura, et al.
IEEE International SOI Conference 2006
Using a new mechanism of electrical pulse generation, we have generated 350 fs (full width at half maximum) electrical pulses on a coplanar transmission line, fabricated on an unimplanted silicon-on-sapphire substrate.
Q. Liang, T. Kawamura, et al.
IEEE International SOI Conference 2006
K. Stawiasz, M.B. Ketchen
IEEE TAS
C.C. Tsuei, J.R. Kirtley, et al.
Chinese Journal of Physics
Hiroki Nakatsuka, D. Grischkowsky, et al.
Physical Review Letters