FPGA-based coprocessor for text string extraction
N.K. Ratha, A.K. Jain, et al.
Workshop CAMP 2000
A special case of nonlinear storage hierarchies, delayed-staging (DS) hierarchies, is introduced. These hierarchies allow the presence of extra paths between the fastest storage levels and the central processing unit permitting some parallelism in the flow of data through the hierarchy. The concept of stack algorithms in linear hierarchies (which are shown to be a special case of the DS setup) is reviewed and formally extended to include two-level DS configurations, thus allowing the application of Stack Processing techniques to gather fault ratio statistics efficiently. The proof of the applicability of stack algorithms to DS hierarchies is constructive, and leads to an algorithm that may be used in the process of gathering statistics through simulation runs. © 1983, ACM. All rights reserved.
N.K. Ratha, A.K. Jain, et al.
Workshop CAMP 2000
Raymond Wu, Jie Lu
ITA Conference 2007
Anupam Gupta, Viswanath Nagarajan, et al.
Operations Research
Donald Samuels, Ian Stobert
SPIE Photomask Technology + EUV Lithography 2007