Signal processor architecture for high-performance real-time applications

A description is given of the software environment for SPARTA (signal processor architecture for real-time applications). The SPARTA hardware consists of a hybrid system with three different types of computers. The program development environment includes the PLH high-level language (on an IBM VM/CMS mainframe) for generating efficient real-time signal processor code. The runtime (user) interface (on an IBM PC) supports symbolic debugging, dynamic loading and linking, and synchronous switching of control algorithms during real-time program execution. It has been interfaced to the object-oriented AML/2 language interpreter. The real-time environment (on multiple IBM Hermes signal processors) has tasks with multiple entries and exits, linked by a method which is somewhat similar to threaded code, but which has lower overhead (0.1 μs, nonpreemptive task switch). The real-time kernel also supports multiple threads of tasks categorized as critical or abortable, reflecting their importance to the real-time system. These threads are scheduled by a priority-based, preemptive scheduler, which has 1.3-5.1 μs total overhead. A SPARTA system with one Hermes signal processor, executing a dozen real-time tasks, has achieved a sample rate of 5 kHz for a fully-coupled PID control, with nonlinear compensation, for the Eaglet II Cartesian robot (five motors achieving 2-μm linear resolution and 0.02° angular resolution.