About cookies on this site Our websites require some cookies to function properly (required). In addition, other cookies may be used with your consent to analyze site usage, improve the user experience and for advertising. For more information, please review your options. By visiting our website, you agree to our processing of information as described in IBM’sprivacy statement. To provide a smooth navigation, your cookie preferences will be shared across the IBM web domains listed here.
Publication
Applied Physics Letters
Paper
Self-aligned self assembly of multi-nanowire silicon field effect transistors
Abstract
We demonstrate the efficacy of diblock copolymer self assembly for solving key fabrication challenges of aggressively scaled silicon field effect transistors. These materials spontaneously form nanometer-scale patterns that self-align to larger-scale lithography, enabling construction of sub-lithographic semiconducting transistor channels composed of arrays of parallel nanowires with critical dimensions (15 nm width, 40 nm pitch) defined by self assembly. The number of nanowires in the arrays is readily adjusted, greatly reducing the complexity associated with width-scaling of nanowire transistors. We measured Schottky source/drain multi-nanowire n -channel devices comprised of 6, 8, 10, and 16 nanowires, with current drives of ∼5 μAwire and current on/off ratios of ∼ 105. © 2005 American Institute of Physics.