Realtime Packet Switching: A performance analysis

In this paper, we model the internal structure of a packet switching node in a Realtime system and characterize the tradeoff between throughput, delay, and packet loss as a function of the buffer size, switching speed, etc. We assume a simple shared single path switch fabric, though the analysis can be generalized to a wider class of switch fabrics. We show that with a small number of buffers the node will provide a guaranteed delay bound for high-priority traffic, a low-average delay for low-priority traffic, no loss of packets at the input and low probability of packet loss at output. © 1988 IEEE