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Publication
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Paper
QuBEC: Boosting Equivalence Checking for Quantum Circuits with QEC Embedding
Abstract
Quantum computing has proven to be capable of accelerating many algorithms by performing tasks that classical computers cannot. As quantum algorithms and implementations grow more complex, the need for rigorous circuit verification becomes critical, ensuring correct compilation and enhancing circuit fidelity through error correction and assertions. In this article, we propose QuBEC, a decision diagram-based quantum equivalence checking approach, that requires less latency compared to existing techniques, while accounting for circuits with quantum error correction redundancy. QuBEC reduces verification time on benchmark circuits by up to 443 ×, while the number of decision diagram nodes required is reduced by up to 798.31 ×, compared to state-of-the-art strategies. The proposed QuBEC framework can contribute to the advancement of quantum computing by enabling faster and more efficient verification of quantum circuits, paving the way for the development of larger and more complex quantum algorithms.