For 2-D product codes used in tape storage, the mapping of error-correction-coding (ECC) blocks (EBs) into 2-D physical blocks (PBs) on magnetic tape is generalized. The 3-D product codes that have the same code rate and EB size as interleaved 2-D product codes currently used in tape storage are proposed. For 3-D product codes, a new family of mappings of EBs into 2-D PBs on magnetic tape is introduced, which fulfills the stringent burst-error-correction requirements of tape storage. The burst-error-correction capability of 2-D and 3-D product code words recorded on magnetic tape is analyzed as a function of track rotation, linear density, and ECC parameters. The performance limits of the tape-storage channel are determined based on computations of channel capacity and random coding bound. Hardware simulations of iterative hard-decision decoding of product codes implemented in a field-programmable gate array demonstrate the improved error-rate performance of 3-D product codes over 2-D product codes.