Probing strained semiconductor structures with nanoscale x-ray diffraction

Abstract

The tailoring of strain distributions within semiconductor features represents a key method to enhance performance in current and future generations of complementary metal-oxide semiconductor (CMOS) devices. Although the impact of strain on carrier mobility in semiconductor materials was first investigated over 50 years ago [1,2], its implementation within the inversion layer of the channels in CMOS device channels has only occurred within the past decade. This includes the deposition of liner materials that possess significant values of residual stress [3]. Eigenstrained structures, deposited epitaxially within recesses on either side of the Si channel, can be used to induce either compressive strain in the channel region, by using materials that possess a larger lattice parameter than Si (e.g., SiGe)[4], or tensile strain, by using materials with a smaller lattice parameter (e.g., SiC). Because these methods generate heterogeneous strain distributions within the composite structure, it is critical to experimentally determine the distribution of strain across the current-carrying paths of the device and the surrounding environment.