Physical and predictive models of ultra thin oxide reliability in CMOS devices and circuits

Abstract

The physics and statistics of dielectric wearout and breakdown in ultra thin SiO2-based gate dielectrics is reviewed. The measurements of the voltage dependence of the defect generation rate and critical defect density, are given allowing better modeling of the voltage dependence of the time-to-breakdown. Such measurements are used to guide the technology development prior to the manufacturing stage.