DATE 2014
Conference paper

Panel: Future SoC verification methodology: UVM evolution or revolution?

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With increasing design complexity System on Chip (SoC) verification is becoming a more and more important and challenging aspect of the overall development process. The Universal Verification Methodology (UVM) is thereby a common solution to this problem; although it still keeps some problems unsolved. In this panel leading experts from industry (both users and vendors) and academy will discuss the future of SoC verification methodology. © 2014 EDAA.