Overview of the pipelined common buffer architecture (PCBA) for memory based packet/cell switching systems

Abstract

A Pipelined Common Buffer Architecture (PCBA) is proposed for memory based switching systems. The PCBA can route both fix-sized cell data and variable-sized packet data. It separates switching system control and packet/cell data streams inside the switching system to simplify the design process for identifying VLSI chip implementation. The PCBA also uses pipelining for both system control and data movement, to achieve the highest possible system throughput.