Publication
Integration, the VLSI Journal
Paper

Maximizing pin alignment by pin permutations

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Abstract

The problem considered here is that of permuting the pins of modules in order to maximize the number of connections which can be achieved in the polysilicon level. Using a graph-theoretic formulation, the problem is shown to be equivalent to that of removing fewest edges in a certain graph to break all cycles. The problem is proved to be NP-complete. A heuristic based on branch-and-bound is proposed. © 1984.

Date

01 Jan 1984

Publication

Integration, the VLSI Journal

Authors

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