David M. Choy, C.K. Wong
BIT
The problem considered here is that of permuting the pins of modules in order to maximize the number of connections which can be achieved in the polysilicon level. Using a graph-theoretic formulation, the problem is shown to be equivalent to that of removing fewest edges in a certain graph to break all cycles. The problem is proved to be NP-complete. A heuristic based on branch-and-bound is proposed. © 1984.
David M. Choy, C.K. Wong
BIT
Gopalakriskhnan Vijayan, Howard H. Chen, et al.
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A. Albrecht, C.K. Wong
Neural Processing Letters
W.K. Luk, D.T. Tang, et al.
DAC 1986