Magneto-resistive IC memory limitations and architecture implications

Abstract

Magneto Resistive MR, elements offer an alternative approach to non-volatile VLSI memory. The approach has unique aspects which will be related to the requirements of high speed, dense, deep sub-micron VLSI memory. The limitation of resistor thermal noise, sensing power, write current, switch fan out, bandwidth, and voltage supply are discussed. Possible MRAM array architectures are listed in the first section. A novel architecture called the Cross Point MTJ MRAM is described that potentially offers higher signal to noise ratio, lower power and higher density than the alternatives. In following sections Signal to Noise Ratio (SNR) and Power Versus Bandwidth constraint equations are proposed for MRAM architectures. Sensing alternatives for MR elements are reviewed and voltage requirements of MRAM architectures are described. Finally MRAM alternatives are compared.