Graphene nanostructures for device applications

Abstract

After an introduction that explains why graphene is in general considered to be promising for electronic applications since a few years, we will discuss several of our own new findings on graphene field-effect transistors. In particular, this article makes three points: 1) The material itself - graphene - offers intrinsic advantages due to reduced scattering in low-dimensional structures. 2) The particular energy dispersion of graphene is a key enabler for operation in a new regime called - the quantum capacitance limit. 3) Scaling of graphene devices is not following the classical, diffusive theory. In detail, we present a simple argument why graphene nanostructures exhibit an intrinsic advantage when considering the gate delay in three-terminal device structures and explain why the possibility to operate in the quantum capacitance Cq limit provides additional benefits. We show experimental data on the energy dependence of Cq that support our previous statements and show first experimental evidence that scaling of the off-state in graphene transistors follows percolation theory rather than conventional diffusive transport equations.