Fear, uncertainty and statistics

Abstract

Statistics will provide the answer to our fear over the increasing uncertainty in chip performance. Our "confidence" in the correct operation of our integrated circuits will take on a new probabilistic meaning. This presentation will make the case for statistical optimization of integrated circuits in order to ensure high performance, yield and robustness. Today's discrete and continuous optimization techniques are not up to the task. New metrics will be required to allow physical synthesis tools to target these new optimization criteria. This presentation will describe the form that such metrics will take, and predict a phased introduction of statistical criteria in the optimization and automated fix-up process.