Yong Liu, Byungsub Kim, et al.
ISSCC 2009
We introduce a single-loop PLL that operates in a narrower-bandwidth, integer- mode during phase lock and in a wider-bandwidth, fractional-N mode during transient. This hybrid PLL, as a generalization of the conventional variable-bandwidth PLL that shins only its bandwidth, simultaneously achieves the fast-locking advantage of the fractional-N PLL and design simplicity of the integer-N PLL, and as such, brings benefits in certain important PLL applications. In addition, the frequency division mode switching, unique in the hybrid PLL, enables a new, more digital protocol to execute bandwidth switching. A CMOS IC prototype attests to the validity of the proposed approach. © 2008 IEEE.
Yong Liu, Byungsub Kim, et al.
ISSCC 2009
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ECTC 2011
Yong Liu, Wing Luk, et al.
ISSCC 2012
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ECTC 2012