Publication
CMG 1991
Conference paper

Evaluating Page Residency Time with Examples from VM/ESA

Abstract

In a storage hierarchy, pages or data blocks are initially placed at one level of the hierarchy and may be moved to another if they are not used. The page replacement algorithm in an operating system selects the pages to be moved to the next lower level of the hierarchy. The elapsed time from the last reference to the time of movement to the next level of the hierarchy is called page life. Page life is not easy to measure because it implies the time stamping of blocks on each reference. When a Clock algorithm is used, page life can be estimated from the period of the examination cycle. However, for most replacement algorithms, an easy measure of page life is not possible. When page life is difficult to calculate the average page residency time in memory can be used instead. Little's law is normally used to relate the time spent in a queue to the average number of elements in the queue and the completion rate. In this paper I will show how Little' s law can be used to calculate the average time that pages stay at a level of a storage hierarchy. Examples will be given from VM/ESA systems showing highlighting main memory, Expanded Storage for paging, and Mini-Disk Cache in Expanded Storage. The location of the relevant data will be explained and output examples from VM/PRF will be used to show results.

Date

Publication

CMG 1991

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