Implementing synaptic functionalities using CMOS compatible ferroelectric materials: in neuromorphic hardware, synaptic weights are defined by the conductance of reprogrammable, analog resistive memories. In Ferroelectric Tunnel Junctions, programming the fraction of domains whose ferroelectric polarization is directed towards one electrode, allows to control the conductance of the later. Two concepts are presented: first, in the "double-layer", the electron tunnel through a ultra-thin (1-4 nm) dielectric layer. In the second concept, the ferroelectric thin film itself is as thin as 3-5 nm. Both technologies are integrated in the Back-End-Of-Line.