Investigations of silicon nano-crystal floating gate memories
Arvind Kumar, Jeffrey J. Welser, et al.
MRS Spring 2000
The integrity of bonded Cu interconnects in wafer-level three-dimensional integration has been investigated as the function of pattern size and density, as well as bonding process parameter. The desired pattern density coupled with the application of bonding process profile we developed gives optimal yield and alignment accuracy, and provides excellent electrical connectivity and contact resistance through the entire wafer. This result is a key milestone in establishing the manufacturability of Cu-based interconnections for 3D integration technology. Copyright © 2011 American Scientific Publishers.
Arvind Kumar, Jeffrey J. Welser, et al.
MRS Spring 2000
J.H. Stathis, R. Bolam, et al.
INFOS 2005
K.A. Chao
Physical Review B
D.D. Awschalom, J.-M. Halbout
Journal of Magnetism and Magnetic Materials