R.J. Gambino, N.R. Stemple, et al.
Journal of Physics and Chemistry of Solids
The design and packaging of integrated circuits requires the calculation of capacitances for three-dimensional conductors located on parallel planes. An integral-equation (IE) computer-solution technique is presented, which provides accurate results. The solution technique minimizes computer storage requirements while maintaining calculating efficiency without excessive computation times. Copyright © 1973 by The Institute of Electrical and Electronics Engineers, Inc.
R.J. Gambino, N.R. Stemple, et al.
Journal of Physics and Chemistry of Solids
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SPIE Advances in Semiconductors and Superconductors 1990
A. Gangulee, F.M. D'Heurle
Thin Solid Films
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Synthetic Metals