Julian J. Hsieh
Journal of Vacuum Science and Technology A: Vacuum, Surfaces and Films
The design and packaging of integrated circuits requires the calculation of capacitances for three-dimensional conductors located on parallel planes. An integral-equation (IE) computer-solution technique is presented, which provides accurate results. The solution technique minimizes computer storage requirements while maintaining calculating efficiency without excessive computation times. Copyright © 1973 by The Institute of Electrical and Electronics Engineers, Inc.
Julian J. Hsieh
Journal of Vacuum Science and Technology A: Vacuum, Surfaces and Films
Min Yang, Jeremy Schaub, et al.
Technical Digest-International Electron Devices Meeting
K.N. Tu
Materials Science and Engineering: A
K.A. Chao
Physical Review B