Andreas C. Cangellaris, Karen M. Coperich, et al.
EMC 2001
The design and packaging of integrated circuits requires the calculation of capacitances for three-dimensional conductors located on parallel planes. An integral-equation (IE) computer-solution technique is presented, which provides accurate results. The solution technique minimizes computer storage requirements while maintaining calculating efficiency without excessive computation times. Copyright © 1973 by The Institute of Electrical and Electronics Engineers, Inc.
Andreas C. Cangellaris, Karen M. Coperich, et al.
EMC 2001
Sang-Min Park, Mark P. Stoykovich, et al.
Advanced Materials
I. Morgenstern, K.A. Müller, et al.
Physica B: Physics of Condensed Matter
T. Schneider, E. Stoll
Physical Review B