S. Cohen, J.C. Liu, et al.
MRS Spring Meeting 1999
The design and packaging of integrated circuits requires the calculation of capacitances for three-dimensional conductors located on parallel planes. An integral-equation (IE) computer-solution technique is presented, which provides accurate results. The solution technique minimizes computer storage requirements while maintaining calculating efficiency without excessive computation times. Copyright © 1973 by The Institute of Electrical and Electronics Engineers, Inc.
S. Cohen, J.C. Liu, et al.
MRS Spring Meeting 1999
Imran Nasim, Melanie Weber
SCML 2024
Biancun Xie, Madhavan Swaminathan, et al.
EMC 2011
Mitsuru Ueda, Hideharu Mori, et al.
Journal of Polymer Science Part A: Polymer Chemistry