C.-C. Yang, B. Li, et al.
IEEE Electron Device Letters
Grain growth of Cu interconnects in a low-k dielectric was achieved at an elevated anneal temperature of 300 °C without stress-migration-related reliability problems. For this, a TaN metal passivation layer was deposited on the plated Cu overburden surface prior to the thermal annealing process. As compared to the conventional anneal process at 100 °C, the passivation layer enabled further Cu grain growth at the elevated temperature, which then resulted in an increased Cu grain size and improved electromigration resistance in the resulted Cu interconnects. © 2012 IEEE.
C.-C. Yang, B. Li, et al.
IEEE Electron Device Letters
Nicholas A. Lanzillo, Oscar D. Restrepo, et al.
Applied Physics Letters
H. Wu, V. Katragadda, et al.
IEDM 2021
D. Edelstein
Microelectronic Manufacturing 1998