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Grain growth of Cu interconnects in a low-k dielectric was achieved at an elevated anneal temperature of 300 °C without stress-migration-related reliability problems. For this, a TaN metal passivation layer was deposited on the plated Cu overburden surface prior to the thermal annealing process. As compared to the conventional anneal process at 100 °C, the passivation layer enabled further Cu grain growth at the elevated temperature, which then resulted in an increased Cu grain size and improved electromigration resistance in the resulted Cu interconnects. © 2012 IEEE.
L. Su, R. Schulz, et al.
VLSI Technology 1998
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Microelectronics Reliability
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Microelectronic Engineering
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