D. Edelstein, H.S. Rathore, et al.
IRPS 2004
Grain growth of Cu interconnects in a low-k dielectric was achieved at an elevated anneal temperature of 300 °C without stress-migration-related reliability problems. For this, a TaN metal passivation layer was deposited on the plated Cu overburden surface prior to the thermal annealing process. As compared to the conventional anneal process at 100 °C, the passivation layer enabled further Cu grain growth at the elevated temperature, which then resulted in an increased Cu grain size and improved electromigration resistance in the resulted Cu interconnects. © 2012 IEEE.
D. Edelstein, H.S. Rathore, et al.
IRPS 2004
D. Nguyen, Kaushik Chanda, et al.
VMIC 2005
W. Robertson, G. Arjavalingam, et al.
Electronics Letters
C.-C. Yang, P. Flaitz, et al.
IEEE Electron Device Letters