True 3-D displays for avionics and mission crewstations
Elizabeth A. Sholler, Frederick M. Meyer, et al.
SPIE AeroSense 1997
Gate-level logic simulation takes up more CPU time as system complexity increases. A special-purpose system which can cut verification time by several orders of magnitude is described. The Yorktown Simulation Engine (YSE) is a highly parallel programmable machine which can simulate up to 1 M gates at a speed of over 2000M gate simulations per second. It is estimated that the IBM 3081 processor could have been simulated at over 1 000 instructions per second on YSE. Gate-level logic simulation is reviewed and the architecture and hardware implementation of the YSE is described. The software architecture, including compiler, linker and register-level language translator, Ysetran, architecture, are detailed. © 1983.
Elizabeth A. Sholler, Frederick M. Meyer, et al.
SPIE AeroSense 1997
N.K. Ratha, A.K. Jain, et al.
Workshop CAMP 2000
Frank R. Libsch, S.C. Lien
IBM J. Res. Dev
Gal Badishi, Idit Keidar, et al.
IEEE TDSC