Low temperature 12 ns DRAM
W.H. Henkels, N.C.-C. Lu, et al.
VLSI-TSA 1989
We have observed the onset of degradation of bipolar transistor characteristics under high current forward stress at room temperature. The observed degradation may be attributed to interface states generated next to the sidewall oxide at the emitter base junction in a self-aligned bipolar transistor. Individual steps in the generation and annealing kinetics may be resolved. The sensitivity of the device to the extrinsic base doping profile is demonstrated and a model based on the generation of hot carriers by Auger recombination and bond breaking by these hot carriers is proposed.
W.H. Henkels, N.C.-C. Lu, et al.
VLSI-TSA 1989
C.T. Chuang, G.P. Li, et al.
ECS Meeting 1984
R. Filippi, R.A. Wachnik, et al.
Journal of Applied Physics
J.H. Stathis, A. Vayshenker, et al.
VLSI Technology 2000